This book will serve a unique purpose. Several times over the past few years I have had students ask me to point them toward literature references on defect tolerant architectures for nano-electronics, or nano-electronics design concepts, etc. For quantum computing and neural nets, well established research communities exist and such references are easy to point to. For Some of these other paradigms, papers often appear in journals that biologists, chemists, materials scientists, physicist, etc., rarely encounter or, worse yet students must turn to patent literature! This book brings together for the first time, many of these modern architectural concepts into a single text, with chapters written by a terrific group of experts, It is sure to become a mainstay in my group, and I expect that it will be a valuable resource for many years to come.
Table of Content
Part I Nano- Computing at the Physical Layer
Nanometer Scale Technologies: Device Considerations
Part II Defect Tolerant Nano- Computing
Nanocomputing in the Presence of Defects and Faults: A Survey
Defect Tolerance at the End of the Roadmap
Obtaining Quadrillion-Transistor Logic Systems Despite Imperfect Manufacture, Hardware Failure, and Incomplete System Specification
A Probabilistic based Design for Nanoscale Computation
Evaluating Reliability Trade-offs for Nano- Architectures
Law of Large Numbers System Design
Part III Nano-Scale Quantum Computing
Challenges in Reliable Quantum Computing
Origins and Motivations for Design Rules in QCA
Partitioning and Placement for Buildable QCA Circuits
Part IV Validation of Nano- Scale Architectures
Verification of Large Scale Nano Systems with Unreliable Nano Devices
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