Description
As the demand for digital communication networks has increased, so have the challenges in network component design. To meet ever-escalating performance, flexibility, and economy requirements, the networking industry has opted to build products around network processors, These new chips range from task-specific processors, such as classification and encryption engines, to more general-purpose packet or communications processors. Programmable yet application-specific, their designs are tailored to efficiently implement communications applications such as routing, protocol analysis, voice and data convergence, firewalls, VPNs, and Qos.
Table of Content
Network Processors: An Introduction to Design Issues
Part I: Design Principles
Benchmarking Network Processors
A Methodology and Simulator for the Study of Network Processors
Design Space Exploration of Network Processor Architectures
Compiler Backend Optimizations for Network Processors with Bit Packet Addressing
A Network Processor Performance and Design Model with Benchmark Parameterization
A Modeling Framework for Network Processor Systems
Part II: Practices
An Industry Analyst’s Perspective on Network Processors
Agere Systems-Communications Optimized PayloadPlus Network Processor Architecture
Cisco Systems-Toaster2
IBM-PowerNP Network Processor
Intel Corporation-Intel IXP2400 Network Processor: A Second Generation Intel NPU
Motorola-C-5e Network Processor
PMC-Sierra, Inc.-Classipl
TranSwitch-ASPEN: Flexible Network Processing of Access Solutions
About The Author
Patrick Crowley is currently a Ph.D. candidate in the Department of Computer Science and Engineering at the University of Washington. Before arriving in Seattle, he earned a B.A. degree, summa cum laude, from Illinois Wesleyan University, where he studied mathematics, physics, and computer science. Patrick’s research interests are in the area of computer systems architecture, with a present focus on the design and analysis of programmable packet processing systems.
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